Show HN: SnackBase – Open-source, GxP-compliant back end for Python teams

Hacker News (score: 30)
Found: January 13, 2026
ID: 2994

Description

DevOps
Show HN: SnackBase – Open-source, GxP-compliant back end for Python teams Hi HN, I’m the creator of SnackBase.

I built this because I work in Healthcare and Life Sciences domain and was tired of spending months building the same "compliant" infrastructure (Audit Logs, Row-Level Security, PII Masking, Auth) before writing any actual product code.

The Problem: Existing BaaS tools (Supabase, Appwrite) are amazing, but they are hard to validate for GxP (FDA regulations) and often force you into a JS/Go ecosystem. I wanted something native to the Python tools I already use.

The Solution: SnackBase is a self-hosted Python (FastAPI + SQLAlchemy) backend that includes:

Compliance Core: Immutable audit logs with blockchain-style hashing (prev_hash) for integrity.

Native Python Hooks: You can write business logic in pure Python (no webhooks or JS runtimes required).

Clean Architecture: Strict separation of layers. No business logic in the API routes.

The Stack:

Python 3.12 + FastAPI

SQLAlchemy 2.0 (Async)

React 19 (Admin UI)

Links:

Live Demo: https://demo.snackbase.dev

Repo: https://github.com/lalitgehani/snackbase

The demo resets every hour. I’d love feedback on the DSL implementation or the audit logging approach.

More from Hacker

Show HN: Open-Source 8-Ch BCI Board (ESP32 and ADS1299 and OpenBCI GUI)

Show HN: Open-Source 8-Ch BCI Board (ESP32 and ADS1299 and OpenBCI GUI) Hi HN, I recently shared this on r&#x2F;BCI and wanted to see what the engineering community here thinks.<p>A while back, I got frustrated with the state of accessible BCI hardware. Research gear was wildly unaffordable. So, I spent a ton of time designing a custom board, software and firmware to bridge that gap. I call it the Cerelog ESP-EEG. It is open-source (Firmware + Schematics), and I designed it specifically to fix the signal integrity issues found in most DIY hardware.<p>I believe in sharing the work. You can find the Schematics, Firmware, and Software setup on the GitHub repo: GITHUB LINK: <a href="https:&#x2F;&#x2F;github.com&#x2F;Cerelog-ESP-EEG&#x2F;ESP-EEG" rel="nofollow">https:&#x2F;&#x2F;github.com&#x2F;Cerelog-ESP-EEG&#x2F;ESP-EEG</a><p>For those who don&#x27;t want to deal with BGA soldering or sourcing components, I do have assembled units available: <a href="https:&#x2F;&#x2F;www.cerelog.com&#x2F;eeg_researchers.html" rel="nofollow">https:&#x2F;&#x2F;www.cerelog.com&#x2F;eeg_researchers.html</a><p>The major features: Forked&#x2F;modified OpenBCI GUI Compatibility as well as Brainflow API, and LSL Compatibility. I know a lot of us rely on the OpenBCI GUI for visualization because it just works. I didn&#x27;t want to reinvent the wheel, so I ensured this board supports it natively.<p>It works out of the box: I maintain a forked modified version of the GUI that connects to the board via LSL (Lab Streaming Layer). Zero coding required: You can visualize FFTs, Spectrograms, and EMG widgets immediately without writing a single line of Python.<p>The &quot;active bias&quot; (why my signal is cleaner): The TI ADS1299 is the gold standard for EEG, but many dev boards implement it incorrectly. They often leave the Bias feedback loop &quot;open&quot; (passive), which makes them terrible at rejecting 60Hz mains hum. I simply followed the datasheet: I implemented a True Closed-Loop Active Bias (Drive Right Leg).<p>How it works: It measures the common-mode signal, inverts it, and actively drives it back into the body. The result: Cleaner data<p>Tech stack:<p><pre><code> ADC: TI ADS1299 (24-bit, 8-channel). MCU: ESP32 Chosen to handle high-speed SPI and WiFi&#x2F;USB streaming Software: BrainFlow support (Python, C++, Java, C#) for those who want to build custom ML pipelines, LSL support, and forked version of OpenBCI GUI support </code></pre> This was a huge project for me. I’m happy to geek out about getting the ESP32 to stream reliably at high sample rates as both the software and firmware for this project proved a lot more challenging than I expected. Let me know what you think!<p>SAFETY NOTE: I strongly recommend running this on a LiPo battery via WiFi. If you must use USB, please use a laptop running on battery power, not plugged into the wall.

Carnap – A formal logic framework for Haskell

Carnap – A formal logic framework for Haskell

Developers can now submit apps to ChatGPT

Developers can now submit apps to ChatGPT

Gh-actions-lockfile: generate and verify lockfiles for GitHub Actions

Gh-actions-lockfile: generate and verify lockfiles for GitHub Actions

No other tools from this source yet.